1. Field of the Invention
This invention relates to a Schottky transistor logic (STL) exclusive-OR gate circuit and to an exclusive-NOR buffer circuit.
2. Brief Description of the Prior Art
Prior art STL exclusive-OR circuits have normally required four gates, such circuits thereby having three gate delays. In some cases the number of gate delays has been reduced to two, however the number of components required has been large and the buffer function is not present. There was a further problem with such prior art TTL exclusive-OR circuits in that it was difficult to translate the logic levels down to operate with a two volt supply, this being the normal operating voltage for schottky devices, rather than with a five volt supply used with TTL. Prior art TTL exclusive-OR circuits are also known wherein cross-coupled base to emitter connections between transistor pairs are provided, thereby forming the desired circuit. In such circuits, the cross coupling is direct rather than through a diode. It is apparent that a reduction in the number of gate delays would be desirable in order to increase the speed of operation of the circuit. It is also apparent that a reduction in the number of components required is desirable, not only in view of economics, but also to reduce power consumption.